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DSP56857 bảng dữ liệu(PDF) 193 Page - Freescale Semiconductor, Inc |
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DSP56857 bảng dữ liệu(HTML) 193 Page - Freescale Semiconductor, Inc |
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193 / 662 page ![]() Register Descriptions (ITCN_BASE = $1FFF20) Overview, Rev. 4 Freescale Semiconductor 8-15 8.7.5.3 ESSI1 Transmit Data Interrupt Priority Level (ESSI1_TD IPL)— Bits 11–10 This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs are limited to priorities zero through two and are disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 8.7.5.4 ESSI1 Transmit Data with Exception Status Interrupt Priority Level (ESSI1_TDES IPL)—Bits 9–8 This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs are limited to priorities zero through two and are disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 8.7.5.5 ESSI1 Receive Last Slot Interrupt Priority Level (ESSI1_RLS IPL)—Bits 7–6 This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs are limited to priorities zero through two and are disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 8.7.5.6 ESSI1 Receive Data Interrupt Priority Level (ESSI1_RD IPL)—Bits 5–4 This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs are limited to priorities zero through two and are disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 |
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