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DSP56857 bảng dữ liệu(PDF) 191 Page - Freescale Semiconductor, Inc |
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DSP56857 bảng dữ liệu(HTML) 191 Page - Freescale Semiconductor, Inc |
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191 / 662 page ![]() Register Descriptions (ITCN_BASE = $1FFF20) Overview, Rev. 4 Freescale Semiconductor 8-13 8.7.4.4 ESSI0 Receive Data Interrupt Priority Level (ESSI0_RD IPL)—Bits 9–8 This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs are limited to priorities zero through two and are disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 8.7.4.5 ESSI0 Receive Data with Exception Status Interrupt Priority Level (ESSI0_RDES IPL)—Bits 7–6 This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs are limited to priorities zero through two and are disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 8.7.4.6 DMA 5 Done Interrupt Priority Level (DMA5 IPL)—Bits 5–4 This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs are limited to priorities zero through two and are disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 8.7.4.7 DMA 4 Done Interrupt Priority Level (DMA4 IPL)—Bits 3–2 This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs are limited to priorities zero through two and are disabled by default. |
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