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DSP56857 bảng dữ liệu(PDF) 188 Page - Freescale Semiconductor, Inc |
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DSP56857 bảng dữ liệu(HTML) 188 Page - Freescale Semiconductor, Inc |
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188 / 662 page ![]() Register Descriptions (ITCN_BASE = $1FFF20) 5685X Digital Signal Controller User Manual, Rev. 4 8-10 Freescale Semiconductor • 11 = IRQ is priority level 3 8.7.3 Interrupt Priority Register 2 (IPR2) Figure 8-5. Interrupt Priority Register 2 (IPR2) See Programmer’s Sheet on Appendix page B - 23 8.7.3.1 DMA 2 Done Interrupt Priority Level (DMA2 IPL)—Bits 15–14 This bit field is used to set the interrupt priority levels for certain EOnCE IRQs. These IRQs are limited to priorities one through three and are disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 8.7.3.2 DMA 1 Done Interrupt Priority Level (DMA1 IPL)—Bits 13–12 This bit field is used to set the interrupt priority levels for certain EOnCE IRQs. These IRQs are limited to priorities one through three and are disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 8.7.3.3 DMA 0 Done Interrupt Priority Level (DMA0 IPL)—Bits 11–10 This bit field is used to set the interrupt priority levels for certain EOnCE IRQs. These IRQs are limited to priorities one through three and are disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 Base + $2 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read DMA2 IPL DMA1 IPL DMA0 IPL 0 0 LOCK IPL 0 0 IRQB IPL IRQA IPL Write Reset 0 00 00 000 00 00 000 0 |
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