DSP56857 datasheet(197/662 Pages) FREESCALE

197 / 662 page

Overview, Rev. 4

Freescale Semiconductor

8-19

8.7.6.8 SPI Transmitter Empty Interrupt Priority Level

(SPI_XMIT IPL)—Bits 1–0

This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These

IRQs are limited to priorities zero through two and are disabled by default.

•

00 = IRQ disabled (default)

•

01 = IRQ is priority level 0

•

10 = IRQ is priority level 1

•

11 = IRQ is priority level 2

8.7.7 Interrupt Priority Register 6 (IPR6)

Figure 8-9. Interrupt Priority Register 6 (IPR6)

See Programmer’s Sheet on Appendix page B - 31

8.7.7.1 Timer Channel 1 Overflow Interrupt Priority Level

(TOVF1 IPL)—Bits 15–14

This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These

IRQs are limited to priorities zero through two and are disabled by default.

•

00 = IRQ disabled (default)

•

01 = IRQ is priority level 0

•

10 = IRQ is priority level 1

•

11 = IRQ is priority level 2

8.7.7.2 Timer Channel 1 Compare Interrupt Priority Level

(TCMP1 IPL)—Bits 13–12

This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These

IRQs are limited to priorities zero through two and are disabled by default.

•

00 = IRQ disabled (default)

•

01 = IRQ is priority level 0

•

10 = IRQ is priority level 1

•

11 = IRQ is priority level 2

Base + $6

Read

TOVF1 IPL

TCMP1 IPL

TINP0 IPL

TOVF0 IPL

TCMP0 IPL

TOD IPL

TOD_ALRM

IPL

HOST_CMD

IPL

Write

Reset

000

DSP56857 bảng dữ liệu(PDF) 197 Page - Freescale Semiconductor, Inc

DSP56857 bảng dữ liệu(HTML) 197 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL