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DSP56857 bảng dữ liệu(PDF) 200 Page - Freescale Semiconductor, Inc |
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DSP56857 bảng dữ liệu(HTML) 200 Page - Freescale Semiconductor, Inc |
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200 / 662 page ![]() Register Descriptions (ITCN_BASE = $1FFF20) 5685X Digital Signal Controller User Manual, Rev. 4 8-22 Freescale Semiconductor 8.7.8.1 Reserved—Bits 15–14 These bits are reserved or not implemented. They are read as 0, but they cannot be modified by writing. 8.7.8.2 Timer Channel 3 Input Edge Interrupt Priority Level (TINP3 IPL)—Bits 13–12 This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs are limited to priorities zero through two and are disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 8.7.8.3 Timer Channel 3 Overflow Interrupt Priority Level (TOVF3 IPL)—Bits 11–10 This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs are limited to priorities zero through two and are disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 8.7.8.4 Timer Channel 3 Compare Interrupt Priority Level (TCMP3 IPL)—Bits 9–8 This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs are limited to priorities zero through two and are disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 |
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