DSP56857 datasheet(204/662 Pages) FREESCALE

204 / 662 page

5685X Digital Signal Controller User Manual, Rev. 4

8-26

Freescale Semiconductor

8.7.10.1 Reserved—Bits 15–13

These bits are reserved or not implemented. They are read as 0, but they cannot be modified by

writing.

8.7.10.2 Interrupt Vector Base Address

(VECTOR_BASE_ADDRESS)—Bits 12–0

The value in this register is used as the upper 13 bits of the interrupt vector Vector Address Bus

(VAB)[20:0]. The lower eight bits are determined based on the highest priority interrupt and are

then appended onto this field (VBA) before presenting the full Vector Address Bus (VAB) to the

56800E core.

8.7.11 Fast Interrupt Match Registers (FIM0 and FIM1)

Figure 8-13. Fast Interrupt 0 Match Register (FIM0)

See Programmer’s Sheet on Appendix page B - 38

Note:

Although the 56800E core allows an unlimited number of fast interrupts, the 568xx

family of chips limits this number to two in order to keep the size of the interrupt

vector table small in terms of memory usage, and to reduce the overhead caused by

each interrupt source having to provide a separate fast interrupt vector.

8.7.11.1 Reserved—Bits 15–7

These bits are reserved or not implemented. They are read as 0, but they cannot be modified by

writing.

8.7.11.2 Fast Interrupt 0 Vector Number (FAST INTERRUPT 0)

These values are used to declare which two IRQs will be Fast Interrupts. Fast Interrupts vector

directly to a service routine based on values in the Fast Interrupt Vector Address registers without

having to go to a jump table first. IRQs used as Fast Interrupts must be set to priority Level 2.

Unexpected results will occur if a Fast Interrupt vector is set to any other priority. Fast Interrupts

automatically become the highest priority Level 2 Interrupt regardless of their location in the

interrupt table prior to being declared as Fast Interrupt. Fast Interrupt 0 has priority over Fast

Interrupt 1. To determine the vector number of each IRQ. Please refer to Table 8-3.

Base + $A

Read

FAST INTERRUPT 0

Write

Reset

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