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DSP56857 bảng dữ liệu(PDF) 199 Page - Freescale Semiconductor, Inc |
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DSP56857 bảng dữ liệu(HTML) 199 Page - Freescale Semiconductor, Inc |
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199 / 662 page ![]() Register Descriptions (ITCN_BASE = $1FFF20) Overview, Rev. 4 Freescale Semiconductor 8-21 8.7.7.6 Time of Day 1 Second Interval Interrupt Priority Level (TOD1 IPL)—Bits 5–4 This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs are limited to priorities zero through two and are disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 8.7.7.7 Time of Day Alarm Interrupt Priority Level (TOD_ALRM IPL)—Bits 3–2 This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs are limited to priorities zero through two and are disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 8.7.7.8 Host I/F Command Interrupt Priority Level (HOST_CMD IPL)—Bits 1–0 This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs are limited to priorities zero through two and are disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 8.7.8 Interrupt Priority Register 7 (IPR7) Figure 8-10. Interrupt Priority Register 7 (IPR7) See Programmer’s Sheet on Appendix page B - 33 Base + $7 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read 0 0 TINP3 IPL TOVS3 IPL TCMP3 IPL TINP2 IPL TOVF2 IPL TCMP2 IPL TINP1 IPL Write Reset 0000 0000000000 00 |
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