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DSP56857 bảng dữ liệu(PDF) 528 Page - Freescale Semiconductor, Inc |
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DSP56857 bảng dữ liệu(HTML) 528 Page - Freescale Semiconductor, Inc |
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528 / 662 page ![]() Application: Date: Programmer: Sheet C 5685X Digital Signal Controller User Manual, Rev. 4 B-26 Freescale Semiconductor 6 of 24 ITCN Interrupt Priority Register 3 (IPR3) continued Bits Name Description 7 - 6 ESSI0_RDES IPL ESSI0 Receive Data with Exception Status Interrupt Priority Level This bit field is used to set the interrupt priority levels for this peripheral IRQ. 00 IRQ disabled by default 01 IRQ is priority level 0 10 IRQ is priority level 1 11 IRQ is priority level 2 5 - 4 DMA5 IPL Done Interrupt Priority Level This bit field is used to set the interrupt priority levels for certain peripheral IRQs. 00 IRQ disabled by default 01 IRQ is priority level 0 10 IRQ is priority level 1 11 IRQ is priority level 2 3 - 2 DMA4 IPL Done Interrupt Priority Level This bit field is used to set the interrupt priority levels for certain peripheral IRQs. 00 IRQ disabled by default 01 IRQ is priority level 0 10 IRQ is priority level 1 11 IRQ is priority level 2 1 - 0 DMA3 IPL Done Interrupt Priority Level This bit field is used to set the interrupt priority levels for certain peripheral IRQs. 00 IRQ disabled by default 01 IRQ is priority level 0 10 IRQ is priority level 1 11 IRQ is priority level 2 Interrupt Priority Register 3 (IPR3) $1FFF20 + $3 Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read ESSI0_TD IPL ESSI0_TDES IPL ESSIO_RLS IPL ESSI0_RLS IPL ESSI_RDES IPL DMA5 IPL DMA4 IPL DMA3 IPL Write Reset 00 0 0 0 000 00 00 00 00 |
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