DSP56857 datasheet(527/662 Pages) FREESCALE

527 / 662 page

Application:

Date:

Programmer:

Sheet

Appendix B - Programmer’s Sheets, Rev. 4

Freescale Semiconductor

B-25

5 of 24

ITCN

Interrupt Priority Register 3 (IPR3)

Bits

Name

Description

15 - 14

ESSI0_TD IPL

ESSI0 Transmit Data Interrupt Priority Level

This bit field is used to set the interrupt priority levels for this peripheral IRQ.

IRQ disabled by default

IRQ is priority level 0

IRQ is priority level 1

IRQ is priority level 2

13 - 12

ESSI0_TDES IPL

ESSI0 Transmit Data with Exception Status Interrupt Priority Level

This bit field is used to set the interrupt priority levels for this peripheral IRQ.

IRQ disabled by default

IRQ is priority level 0

IRQ is priority level 1

IRQ is priority level 2

11 - 10

ESSIO_RLS IPL

ESSIO Receive Last Slot Interrupt Priority Level

This bit field is used to set the interrupt priority levels for certain peripheral IRQs.

IRQ disabled by default

IRQ is priority level 0

IRQ is priority level 1

IRQ is priority level 2

9 - 8

ESSI0_RD IPL

ESSI0 Receive Data Interrupt Priority Level

This bit field is used to set the interrupt priority levels for this peripheral IRQ.

IRQ disabled by default

IRQ is priority level 0

IRQ is priority level 1

IRQ is priority level 2

Interrupt Priority

$1FFF20 + $3

Bits

Read ESSI0_TD

IPL

ESSI0_TDES

IPL

ESSIO_RLS

IPL

ESSI0_RLS

IPL

ESSI_RDES

IPL

DMA5 IPL DMA4 IPL DMA3 IPL

Write

Reset

0000

000

denotes Reserved Bits

See the following page for continuation of this register

DSP56857 bảng dữ liệu(PDF) 527 Page - Freescale Semiconductor, Inc

DSP56857 bảng dữ liệu(HTML) 527 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL