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DSP56857 bảng dữ liệu(PDF) 532 Page - Freescale Semiconductor, Inc |
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DSP56857 bảng dữ liệu(HTML) 532 Page - Freescale Semiconductor, Inc |
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532 / 662 page ![]() Application: Date: Programmer: Sheet C 5685X Digital Signal Controller User Manual, Rev. 4 B-30 Freescale Semiconductor 10 of 24 ITCN Interrupt Priority Register 5 (IPR5) continued Interrupt Priority Register 5 (IPR5) $1FFF20 + $5 Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read HOST_XMIT IPL HOST_RCV IPL SCI0_RCV IPL SCI0_RERR IPL SC0_RIDL IPL SCI0_TIDL IPL SCI0_XMIT IPL SPI_XMIT IPL Write Reset 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Bits Name Description 7 - 6 SCI0_RIDL IPL SCI0 Receiver Idle Interrupt Priority Level This bit field is used to set the interrupt priority levels for this peripheral IRQ. 00 IRQ disabled by default 01 IRQ is priority level 0 10 IRQ is priority level 1 11 IRQ is priority level 2 5 - 4 SCI0_TIDL IPL SCI Transmitter Idle Interrupt Priority Level This bit field is used to set the interrupt priority levels for this peripheral IRQ. 00 IRQ disabled by default 01 IRQ is priority level 0 10 IRQ is priority level 1 11 IRQ is priority level 2 3 - 2 SCI0_XMIT IPL SPI Transmitter Empty Interrupt Priority Level This bit field is used to set the interrupt priority levels for this peripheral IRQ. 00 IRQ disabled by default 01 IRQ is priority level 0 10 IRQ is priority level 1 11 IRQ is priority level 2 1 - 0 SPI_XMIT IPL SPI Transmitter Empty Interrupt Priority Level This bit field is used to set the interrupt priority levels for this peripheral IRQ. 00 IRQ disabled by default 01 IRQ is priority level 0 10 IRQ is priority level 1 11 IRQ is priority level 2 |
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