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DSP56857 bảng dữ liệu(PDF) 267 Page - Freescale Semiconductor, Inc

tên linh kiện DSP56857
Giải thích chi tiết về linh kiện  Digitial Signal Controller
PDF  662 Pages
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nhà sản xuất  FREESCALE [Freescale Semiconductor, Inc]
Trang chủ  http://www.freescale.com
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DSP56857 bảng dữ liệu(HTML) 267 Page - Freescale Semiconductor, Inc

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Serial Communications Interface (SCI), Rev. 4
Freescale Semiconductor
10-31
10.9.5 SCI Data Register (SCIDR)
The SCI Data Register (SCIDR) can be read and modified at any time. Reading accesses SCI
Receive Data Register (SRDR). Writing to the register accesses SCI Transmit Data Register
(STDR).
Figure 10-21. SCI Data Register (SCIDR)
See Programmer’s Sheets on Appendix page B-61
10.9.5.1 Reserved—Bits 15–9
These bits are reserved or not implemented. They are read and written as 0.
10.9.5.2 Receive Data—Bits 8–0
Data received.
10.9.5.3 Transmit Data—Bits 8–0
Data to be transmitted.
10.10 Clocks
All timing is derived from the IPBus clock at half of the system clock for this module. Please see
Section 10.6.2 for a description of how the data rate is determined.
10.11 Resets
Reset characteristics are determined by the state of control register bit settings. Therefore, the
register descriptions comprising Section 10.9 cover all reset functions.
Base + $4
15
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11
10
9
8
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5
4
3
2
1
0
Read
0
0
0
0
0
0
0
RECEIVE DATA
Write
TRANSMIT DATA
Reset
0
00
0
000
00
000
000
0



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