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MSP432P411VIPZ bảng dữ liệu(PDF) 159 Page - Texas Instruments

tên linh kiện MSP432P411VIPZ
Giải thích chi tiết về linh kiện  SimpleLink Mixed-Signal Microcontrollers
PDF  212 Pages
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Trang chủ  http://www.ti.com
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MSP432P411VIPZ bảng dữ liệu(HTML) 159 Page - Texas Instruments

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MSP432P4111, MSP432P4011, MSP432P411Y
MSP432P401Y, MSP432P411V, MSP432P401V
www.ti.com
SLASEA0A – DECEMBER 2017 – REVISED FEBRUARY 2018
Submit Documentation Feedback
Product Folder Links: MSP432P4111 MSP432P4011 MSP432P411Y MSP432P401Y MSP432P411V MSP432P401V
Detailed Description
Copyright © 2017–2018, Texas Instruments Incorporated
(1)
X = Don't care
(2)
Not available on the 64-pin RGC package.
(3)
Setting the PSEL1.x and PSEL0.x bits to 10 disables both the output driver and input Schmitt trigger to prevent leakage when analog
signals are applied.
Table 6-68. Port P2 (P2.4 to P2.7) Pin Functions
PIN NAME (P2.x)
x
FUNCTION
CONTROL BITS OR SIGNALS (1)
P2DIR.x
P2SEL1.x
P2SEL0.x
P2MAPx
P2.4/PM_TA0.1/L23 (2)
4
P2.4 (I/O)
I: 0; O: 1
0
0
X
TA0.CCI1A
0
0
1
default
TA0.1
1
L23 (3)
X
1
0
X
N/A
0
1
1
X
DVSS
1
P2.5/PM_TA0.2/L22 (2)
5
P2.5 (I/O)
I: 0; O: 1
0
0
X
TA0.CCI2A
0
0
1
default
TA0.2
1
L22 (3)
X
1
0
X
N/A
0
1
1
X
DVSS
1
P2.6/PM_TA0.3/L21 (2)
6
P2.6 (I/O)
I: 0; O: 1
0
0
X
TA0.CCI3A
0
0
1
default
TA0.3
1
L21 (3)
X
1
0
X
N/A
0
1
1
X
DVSS
1
P2.7/PM_TA0.4/L20 (2)
7
P2.7 (I/O)
I: 0; O: 1
0
0
X
TA0.CCI4A
0
0
1
default
TA0.4
1
L20 (3)
X
1
0
X
N/A
0
1
1
X
DVSS
1



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