HT56RB688_13 datasheet(36/164 Pages) HOLTEK

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Port A Open Drain Function

All I/O pins in the device have CMOS structures, however Port A pins PA0~PA3 can also be setup as

open drain structures. This is implemented using the ODE0~ ODE3 bits in the MISC1 register.

MISC1 Register

Bit

76543210

Name

ODE3

ODE2

ODE1

ODE0

WDTEN3

WDTEN2

WDTEN1

WDTEN0

R/W

POR

00001010

Bit 7

ODE3: PA3 Open Drain control

0: disable

1: enable

Bit 6

ODE2: PA2 Open Drain control

0: disable

1: enable

Bit 5

ODE1: PA1 Open Drain control

0: disable

1: enable

Bit 4

ODE0: PA0 Open Drain control

0: disable

1: enable

Bit 3~0

WDTEN3, WDTEN2, WDTEN1, WDTEN0: WDT function enable

Described in Watchdog Timer section.

I/O Port Control Registers

Each I/O port has its own control register known as PAC, PBC, etc., to control the input/output

configuration. With this control register, each CMOS output or input with or without pull-high resistor

structures can be reconfigured dynamically under software control. Each pin of the I/O ports is directly

mapped to a bit in its associated port control register. For the I/O pin to function as an input, the

corresponding bit of the control register must be written as a ²1². This will then allow the logic state of

the input pin to be directly read by instructions. When the corresponding bit of the control register is

written as a ²0², the I/O pin will be setup as a CMOS output. If the pin is currently setup as an output,

instructions can still be used to read the output register. However, it should be noted that the program

will in fact only read the status of the output data latch and not the actual logic status of the output pin.

Rev. 1.10

April 15, 2013

HT56RB688

TinyPowerTM A/D type Smart Card OTP MCU

with LCD, DAC, ISO 7816 and USB Interfaces

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