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SPC564A80L7 bảng dữ liệu(PDF) 104 Page - STMicroelectronics

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Electrical characteristics
SPC564A74L7, SPC564A80B4, SPC564A80L7
104/157
Doc ID 15399 Rev 9
3.10
Oscillator and PLLMRFM electrical characteristics
10
Delay (H/L), sync Mode
tPDSYNC
CC
D
4
ns
11
Delay, Z to Normal
(High/Low)
TDZ
CC
D
—
500
ns
12
Diff Skew Itphla-tplhbI or
Itplhb-tphlaI
TSKEW
CC
D
—
0.5
ns
Termination
13
Trans. Line (differential Zo)
CC
D
—
95
100
105
14
Temperature
CC
D
–40
150
C
Table 25.
DSPI LVDS pad specification (continued)
#
Characteristic
Symbol
C
Condition
Min.
Value
Typ.
Value
Max.
Value
Unit
Table 26.
PLLMRFM electrical specifications
(VDDPLL = 1.08 V to 3.6 V, VSS = VSSPLL = 0 V, TA = TL to TH)
Symbol
C
Parameter
Conditions
Value
Unit
min
max
fref_crystal
fref_ext
CC
D
PLL reference frequency range(1)
Crystal
reference
440
MHz
C
External
reference
480
fpll_in
CC
P
Phase detector input frequency range
(after pre-divider)
—4
16
MHz
fvco
CC
P
VCO frequency range
—
256
512
MHz
fsys
CC
C
On-chip PLL frequency(2)
—
16
150
MHz
fsys
CC
T
System frequency in bypass mode(2)
Crystal
reference
440
MHz
P
External
reference
080
tCYC
CC
D
System clock period
—
—
1 / fsys
ns
fLORL
fLORH
CC
D
Loss of reference frequency
window(3)
Lower limit
1.6
3.7
MHz
D
Upper limit
24
56
fSCM
CC
P
Self-clocked mode frequency (4),(5)
—
1.2
72.25
MHz



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