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SPC564A80L7 bảng dữ liệu(PDF) 108 Page - STMicroelectronics

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Electrical characteristics
SPC564A74L7, SPC564A80B4, SPC564A80L7
108/157
Doc ID 15399 Rev 9
GAINVGA2
(1)
CC
–
Variable gain amplifier accuracy (gain=2)(2)
CC
D
INL
8MHz
ADC
–5
5
Counts
CC
D
16 MHz
ADC
–8
8
Counts
CC
D
DNL
8MHz
ADC
–3
3
Counts
CC
D
16 MHz
ADC
–3
3
Counts
GAINVGA4
(1)
CC
–
Variable gain amplifier accuracy (gain=4)(2)
CC
D
INL
8MHz
ADC
–7
7
Counts
CC
D
16 MHz
ADC
–8
8
Counts
CC
D
DNL
8MHz
ADC
–4
4
Counts
CC
D
16 MHz
ADC
–4
4
Counts
DIFFmax
CC
C
Maximum
differential voltage
(DANx+ - DANx-)
or (DANx- -
DANx+)(5)
PREGAIN
set to 1X
setting
—
(VRH - VRL)/2
V
DIFFmax2
CC
C
PREGAIN
set to 2X
setting
—
(VRH - VRL)/4
V
DIFFmax4
CC
C
PREGAIN
set to 4X
setting
—
(VRH - VRL)/8
V
DIFFcmv
CC
C
Differential input
Common mode
voltage (DANx- +
DANx+)/2(5)
—
(VRH + VRL)/2 -
5%
(VRH + VRL)/2 +
5%
V
1.
Applies only to differential channels.
2.
Variable gain is controlled by setting the PRE_GAIN bits in the ADC_ACR1-8 registers to select a gain factor of
1, 2, or
4. Settings are for differential input only. Tested at 1 gain. Values for other settings are guaranteed by as indicated.
3.
At VRH – VRL = 5.12 V, one LSB = 1.25 mV.
4.
Guaranteed 10-bit mono tonicity.
5.
Voltages between VRL and VRH will not cause damage to the pins. However, they may not be converted accurately if the
differential voltage is above the maximum differential voltage. In addition, conversion errors may occur if the common
mode voltage of the differential signal violates the Differential Input common mode voltage specification.
Table 30.
eQADC differential ended conversion specifications (operating) (continued)
Symbol
C
Parameter
Value
Unit
min
max



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