SPC564A80L7 datasheet(25/157 Pages) STMICROELECTRONICS

25 / 157 page

SPC564A74L7, SPC564A80B4, SPC564A80L7

Introduction

Doc ID 15399 Rev 9

25/157

The FlexCAN modules provide the following features:

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Full Implementation of the CAN protocol specification, Version 2.0B

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Standard data and remote frames

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Extended data and remote frames

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Zero to eight bytes data length

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Programmable bit rate up to 1 Mbit/s

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Content-related addressing

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64 message buffers of zero to eight bytes data length

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Individual Rx Mask Register per message buffer

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Each message buffer configurable as Rx or Tx, all supporting standard and extended

messages

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Includes 1088 bytes of embedded memory for message buffer storage

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Includes 256-byte memory for storing individual Rx mask registers

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Full featured Rx FIFO with storage capacity for six frames and internal pointer handling

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Powerful Rx FIFO ID filtering, capable of matching incoming IDs against 8 extended, 16

standard or 32 partial (8 bits) IDs, with individual masking capability

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Selectable backwards compatibility with previous FlexCAN versions

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Programmable clock source to the CAN Protocol Interface, either system clock or

oscillator clock

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Listen only mode capability

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Programmable loop-back mode supporting self-test operation

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3 programmable Mask Registers

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Programmable transmit-first scheme: lowest ID, lowest buffer number or highest priority

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Time Stamp based on 16-bit free-running timer

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Global network time, synchronized by a specific message

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Maskable interrupts

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Warning interrupts when the Rx and Tx Error Counters reach 96

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Independent of the transmission medium (an external transceiver is assumed)

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Multi-master concept

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High immunity to EMI

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Short latency time due to an arbitration scheme for high-priority messages

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Low power mode, with programmable wake-up on bus activity

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