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SPC564A80L7 bảng dữ liệu(PDF) 103 Page - STMicroelectronics

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SPC564A74L7, SPC564A80B4, SPC564A80L7
Electrical characteristics
Doc ID 15399 Rev 9
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3.9.2
LVDS pad specifications
LVDS pads are implemented to support the MSC (Microsecond Channel) protocol which is
an enhanced feature of the DSPI module. The LVDS pads are compliant with LVDS
specifications and support data rates up to 50 MHz.
Table 24.
VRC33 pad average DC current
(1)
Pad
Type
Symbol
C
Period
(ns)
Load
(2)
(pF)
VRC33
(V)
VDDE
(V)
Drive
Select
IDD33 Avg
(µA)
IDD33 RMS
(µA)
Fast
IDRV_FC
CC
D
10
50
3.6
3.6
11
2.35
6.12
CC
D
10
30
3.6
3.6
10
1.75
4.3
CC
D
10
20
3.6
3.6
01
1.41
3.43
CC
D
10
10
3.6
3.6
00
1.06
2.9
CC
D
10
50
3.6
1.98
11
1.75
4.56
CC
D
10
30
3.6
1.98
10
1.32
3.44
CC
D
10
20
3.6
1.98
01
1.14
2.95
CC
D
10
10
3.6
1.98
00
0.95
2.62
1.
These are typical values that are estimated from simulation and not tested. Currents apply to output pins only.
2.
All loads are lumped.
Table 25.
DSPI LVDS pad specification
#
Characteristic
Symbol
C
Condition
Min.
Value
Typ.
Value
Max.
Value
Unit
Data Rate
4
Data Frequency
f
LVDSCLK
CC
D
—
50
MHz
Driver Specs
5
Differential output voltage
VOD
CC
P
SRC=0b00
or 0b11
150
400
mV
CC
P
SRC=0b01
90
320
CC
P
SRC=0b10
160
480
6
Common mode voltage
(LVDS), VOS
VOD
CC
P
1.06
1.2
1.39
V
7
Rise/Fall time
TR/TF
CC
D
—
2
ns
8
Propagation delay (Low to
High)
TPLH
CC
D
4
ns
9
Propagation delay (High to
Low)
TPHL
CC
D
—
4
ns



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