DSP56156ROM datasheet(27/76 Pages) MOTOROLA

27 / 76 page

AC Electrical Characteristics and Timing

MOTOROLA

DSP56156 Data Sheet

Table 14 Wait and Stop Timings

Num

Characteristics

40 MHz

50 MHz

60 MHz

Unit

Min

Max

Min

Max

Min

Max

DR Asserted to CLK high (Setup

Time for Synchronous Recovery

from Wait State)

cyc - 4

cyc - 3

cyc - 2

CLK high to DSO (ACK) Valid

(Enter Debug Mode) after Syn-

chronous Recovery from Wait

State

18 cyc

—

18 cyc

—

18 cyc

—

DR to DSO (ACK) Valid

(Enter Debug Mode)

- After Asynchronous Recovery

from Stop State

- After Asynchronous Recovery

from Wait State

29 cyc

18 cyc

—

29 cyc

18 cyc

—

29 cyc

18 cyc

—

DR Assertion Width

- to Recover from Wait/Stop

without entering debug mode

- to Recover from Wait/Stop

short wake-up and enter

debug mode

- to Recover from Stop

long wake-up and enter

debug mode

29 cyc

262157

cyc

10 cyc

—

29 cyc

262157

cyc

10 cyc

—

29 cyc

262157

cyc

10 cyc

—

Figure 15 Recovery from Wait State Using DR Pin — Synchronous Timing

(input)

DSO

(output)

Reset, Stop, Wait, Mode Select, and Interrupt Timing

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

DSP56156ROM bảng dữ liệu(PDF) 27 Page - Motorola, Inc

DSP56156ROM bảng dữ liệu(HTML) 27 Page - Motorola, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76

bảng dữ liệu tải về

Link URL