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DS3134 bảng dữ liệu(PDF) 99 Page - Dallas Semiconductor

tên linh kiện DS3134
Giải thích chi tiết về linh kiện  Chateau Channelized T1 And E1 And HDLC Controller
PDF  203 Pages
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nhà sản xuất  DALLAS [Dallas Semiconductor]
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DS3134 bảng dữ liệu(HTML) 99 Page - Dallas Semiconductor

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Bits 0 to 12 / Small Buffer Select Bit (SBS0 to SBS12).
0000000000000 (0000h) = Buffer Size is 0 Bytes
1111111111111 (1FFFh) = Buffer Size is 8191 Bytes
On a HDLC channel basis in the Receive DMA Configuration RAM, the Host will instruct the DMA on
how to use the large and small buffers for the incoming packet data on that particular HDLC channel.
The Host has three options (1) only use Large Buffers, (2) only use Small Buffers, and (3) first fill a Small
Buffer then if the incoming packet requires more buffer space, use one or more Large Buffers for the
remainder of the packet. The Host selects which option via the Size field in the Receive Configuration
RAM (see Section 8.1.5). Large Buffers are best used for data intensive, time insensitive packets like
graphics files whereas small buffers are best used for time sensitive information like real-time voice.
Receive DMA Main Operational Areas Table 8.1.1A
Name
Section
Description
Packet
Descriptors
8.1.2
A dedicated area of memory that describes the location
and attributes of the packet data.
Free Queue
Descriptors
8.1.3
A dedicated area of memory that the Host will write to
inform the DMA where to store incoming packet data.
Done Queue
Descriptors
8.1.4
A dedicated area of memory that the DMA will write to
inform the Host that the packet data is ready for
processing.
The Done Queue Descriptors contain information that the DMA wishes to pass to the Host. Via the Done
Queue Descriptors the DMA informs the Host about the incoming packet data and where to find the
Packet Descriptors that it has written into main memory. Each completed Descriptor contains the starting
address of the data buffer where the packet data is stored.
If enabled, the DMA can burst read the Free Queue Descriptors and burst writes the Done Queue
Descriptors. This helps minimize PCI Bus accesses, freeing the PCI Bus up to do more time critical
functions. See Sections 8.1.3 and 8.1.4 for more details on this feature.



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