DS3134 datasheet(102/203 Pages) DALLAS

tên linh kiện	DS3134

Giải thích chi tiết về linh kiện	Chateau Channelized T1 And E1 And HDLC Controller

PDF	203 Pages

Scroll/Zoom	100%

nhà sản xuất	DALLAS [Dallas Semiconductor]

Trang chủ	https://www.maximintegrated.com/en.html

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102 / 203 page

DS3134

102 of 203

Receive DMA Memory Organization Figure 8.1.1B

Free Data Buffer Space

Receive Free Queue Descriptors:

Contains 32-Bit Addresses for Free Data

Buffers & their Associated

Free Packet Descriptors

Free Queue Base Address (32)

Free Queue End Address (16)

Free Queue Small Buffer Start Address (16)

Free Queue Large Buffer Host Write Pointer (16)

Free Queue Large Buffer DMA Read Pointer (16)

Free Queue Small Buffer DMA Read Pointer (16)

Free Queue Small Buffer Host Write Pointer (16)

Up to 64K Dual dwords

Free Queue Descriptors Allowed

Receive Done Queue Descriptors:

Contains Index Pointers to

Used Packet Descriptors

Done Queue Base Address (32)

Done Queue End Address (16)

Done Queue DMA Write Pointer (16)

Done Queue Host Read Pointer (16)

Up to 64K dwords Done Queue

Descriptors Allowed

Receive Packet Descriptors:

Contains 32-Bit Addresses

to Free Buffer as well as

Status/Control Information and

Links to Other Packet Descriptors

Descriptor Base Address (32)

Up to 64K Quad dwords

Descriptors Allowed

Used Data Buffer Space

Main Offboard Memory

(32-Bit Address Space)

Internal Chateau Registers

dmarbd

DS3134 bảng dữ liệu(PDF) 102 Page - Dallas Semiconductor