CP3SP33SMSSLASHNOPB datasheet(236/407 Pages) TI1

236 / 407 page

CP3SP33

SNOSCW5 – MAY 2013

www.ti.com

8M M7

ARFH

ARFL

The Audio Receive FIFO Low Byte shows the lower byte of the receive FIFO location currently

addressed by the Receive FIFO Read Pointer (RRP).

ARFH

The Audio Receive FIFO High Byte shows the upper byte of the receive FIFO location

currently addressed by the Receive FIFO Read Pointer (RRP). In 8-bit mode, ARFH contains

undefined data.

24.7.2 Audio Receive DMA Register n (ARDRn)

The ARDRn register contains the data received within slot n, assigned for DMA support. In 8-bit mode,

only the lower 8-bit portion of the ARDRn register is used, and the upper byte contains undefined data. In

16-bit mode, a 16-bit word is transferred from the Audio Receive Shift Register (ARSR) into the ARDRn

registers. After reset, these registers are clear.

8M M7

ARDH

ARDL

The Audio Receive DMA Low Byte field receives the lower byte of the audio data copied from

the ARSR.

ARDH

In 16-bit mode, the Audio Receive DMA High Byte field receives the upper byte of the audio

data word copied from ARSR. In 8-bit mode, the ARDH register holds undefined data.

24.7.3 Audio Transmit FIFO Register (ATFR)

The ATFR register shows the transmit FIFO location currently addressed by the Transmit FIFO Write

Pointer (TWP). The Audio Transmit Shift Register (ATSR) receives 8-bit or 16-bit data from the transmit

FIFO, when the ATSR is empty. In 8-bit mode, only the lower 8-bit portion of the ATSR is used, and the

upper byte is ignored (not transferred into the ATSR). In 16-bit mode, a 16-bit word is copied from the

transmit FIFO into the ATSR. The APB bus master has write-only access to the transmit FIFO,

represented by the ATFR register. After reset, the transmit FIFO (ATFR) contains undefined data.

8M M7

ATFH

ATFL

The Audio Transmit Low Byte field represents the lower byte of the transmit FIFO location

currently addressed by the Transmit FIFO Write Pointer (TWP).

ATFH

In 16-bit mode, the Audio Transmit FIFO High Byte field represents the upper byte of the

transmit FIFO location currently addressed by the Transmit FIFO Write Pointer (TWP). In 8-bit

mode, the ATFH field is not used.

24.7.4 Audio Transmit DMA Register n (ATDRn)

The ATDRn register contains the data to be transmitted in slot n, assigned for DMA support. In 8-bit

mode, only the lower 8-bit portion of the ATDRn register is used, and the upper byte is ignored (not

transferred into the ATSR). In 16-bit mode, the whole 16-bit word is transferred into the ATSR. The APB

bus master, typically a DMA controller, has write-only access to the transmit DMA registers. After reset,

these registers are clear.

8M M7

ATDH

ATDL

236

Advanced Audio Interface

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