VX6854LC datasheet(56/114 Pages) STMICROELECTRONICS

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Video timing

VX6854LC

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DocID027110 Rev 2

The host must ensure the following rules are kept:

•

the end address must be greater than the start address

•

the x and y start addresses are restricted to even numbers only, and the x and y end

addresses are restricted to odd numbers only, to ensure that there is always a even

number of pixels readout

6.1.2

Programmable width and height for output image data

The x_output_size and y_output_size registers are not intended as the primary cropping

controls.

They are intended to define the position of the LE/FE codes in the CCP data frame so that

the sensor does not need to calculate this based on region of interest or sub-sampling

settings. It should be expected that the host will set the output sizes to exactly enclose the

output image data. If the host should not do this, the VX6854LC will treat the output sizes as

being calculated from the top left hand corner of the output array. So in the case where

output sizes are smaller than the output data, the data shall be cropped from its right hand

and lower limits. In the case where larger than the output data, the lines shall be padded out

to the defined output size with undefined data.

Figure 15. Output size within a CCP data frame

Note:

CCP2 requires that the number of pixels between the line start and line end sync codes for:

•

RAW8 is a multiple of 4 pixels

•

RAW10 is a multiple of 16 pixels

The host must control the x_output_size to ensure that the above criteria is met.

6.1.3

Scaling

The VX6854LC module is compliant with the “Profile Level 2 - Full (Horizontal & Vertical)”

level of image scaling.

The image scaling function within the sensor module provides a flexible way of generating

lower resolution full field of view image data, at a reduced data rates, for viewfinder and

video applications.

CCP output active line length

Interframe padding

x_output_size

Output data

Embedded data lines

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