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VX6854LC bảng dữ liệu(PDF) 55 Page - STMicroelectronics

tên linh kiện VX6854LC
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VX6854LC bảng dữ liệu(HTML) 55 Page - STMicroelectronics

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VX6854LC
Video timing
69
6
Video timing
6.1
Output size
The VX6854LC has the following methods available to achieve the required output size,
these can be used independently or in conjunction with any other:
•
programmable addressable region of the pixel array
•
programmable width and height for output image data
•
scaling
•
subsampling
The programmable image size and output size are independent functions. It is the
responsibility of the host to ensure that these functions are programmed correctly for the
intended application. These functions also reduce the amount of data and therefore reduce
the peak data rate of CCP2/CSI-2.
6.1.1
Programmable addressable region of the pixel array
The native size for the VX6854LC is 2048 x 1536, the maximum addressable array is 2064
x 1552 which gives border (outer 8 rows and 8 columns) pixels for the color reconstruction
algorithms to use at the edges of the array.
By programming the x_addr_start, y_addr_start, x_addr_end and y_addr_end registers it is
possible to use the full size of the array as you would do for a native size output or you can
select a “window of interest”. The addressed region of the array is used in any subsequent
sub-sampling or scaling.
Figure 14. Programmable addressable region of the pixel array
y_addr_max =1551
x_addr_max =2063
y_addr_min = 0
x_addr_min = 0
x_addr_max, y_addr_max
x_addr_end, y_addr_end
Addressed
pixel array region
x_addr_start, y_addr_start
x_addr_min, y_addr_min



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