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L9662 bảng dữ liệu(PDF) 42 Page - STMicroelectronics |
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L9662 bảng dữ liệu(HTML) 42 Page - STMicroelectronics |
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42 / 80 page ![]() Functional description L9662 42/80 DocID028325 Rev 1 sequences are received, bit D0 is set to ‘1.’ Otherwise, bit D0 is set to ‘0.’ When ASIC receives valid soft reset sequences, it will send a MISO register mode response containing 0x2003 in the next SPI transmission. Configuration mode 2 Configuration mode 2 main function is as follows: Set the latch time for FENx input The SPI message definition for MOSI commands and MISO responses in this mode are defined below. Bits [D9:D8] Bits are used to set the period of the FEN latch timer. The device has 4 independent timers. A valid FENx input will start the pulse stretch timer. These bits will set the timer duration. These values default to ‘00’ after a POR event. Deployment commands The deployment mode is used to activate the drivers. Two consecutive commands are required to activate the drivers. Any combination of channels can be fired as long as the prerequisite conditions are met as indicated in the previous section. MSB LSB D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 MOSI Command for Configuration Mode 2 0 0 P R/W 0 1 Latch bits 0 0 0 0 0 0 0 0 MISO Response for Configuration Mode 2 0 0 P R/W 0 1 Latch bits 0 0 0 0 0 0 0 0 Table 18. Configuration mode 2 Bit MOSI command MISO response State Description D15 0 Mode bits See above D14 0 See above D13 Odd Parity – Includes all 16 bits Odd Parity – Includes all 16 bits D12 0 Read (default) - When D12=’0’ bits D11 to D0 are ignored R/W bit 1 Write – FEN latch programming D11 0 D10 1 D9 00 = 0ms 01 = 128ms 10 = 256ms 11 = 512ms FEN latch time Internal Stored Value FEN latch bits D8 D7 – D0 0 See above |
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