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L9662 bảng dữ liệu(PDF) 63 Page - STMicroelectronics |
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L9662 bảng dữ liệu(HTML) 63 Page - STMicroelectronics |
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63 / 80 page ![]() DocID028325 Rev 1 63/80 L9662 Functional description 79 DATA buffer/DATA transfer The IC includes 4 internal DATA registers; one for each output channel, each one is 16 bits and one deep. Figure 19. Data buffer / data transfer diagram Once the data is transferred to the SPI transfer buffer the satellite data register is cleared. If there is no incoming satellite message before the next SPI data read a register empty flag will be indicated assuming no other fault conditions exist. Current sensor description Each output channel senses the current drawn by the remote satellite sensor. The circuit modulates the load current into logic voltage levels for post processing by a Manchester decoder. Each channel has an internal comparator with a programmable currents trip points selectable through the appropriate setting in the CCR Register for each of the 4 satellite channels. For determining the appropriate current threshold setting the total current, idle plus signal, must be taken into account. The current sense comparator also provides hysteresis, which can be enabled through appropriate setting in the CCR Register. Each comparator output have a de-glitch filter as a function of the protocol speed. Satellite short conditions Each channel has a short circuit protection by independent current limit. When a short to ground occurs the output becomes current limited to 150 mA maximum when the voltage is at idle and 280 mA maximum during the sync pulse for a total period of tFlt _GND. After time tFlt _GND the output will shut off and a leakage to ground fault shall be reported in the SR word. The output will remain off until re-enabled via SPI and if the short is not present then the outputs shall return to normal operation. All channels that do not have a short condition shall not be affected. When the output is shorted to battery, an internal comparator senses the output voltage level then turns off an internal series transistor to provide blocking diode for the current going through the output channel. The output will be OFF only when fault condition is present. As soon as the fault disappears, the interface will become ON again. A leakage to battery fault will be set and reported in the SR word after it has been present for tFlt _BATT. Once read it shall be cleared and if the condition is still present the flag will be set. The comparators have 20 to 50 mV input offset to prevent turning off the output under an open circuit condition. |
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