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L9662 bảng dữ liệu(PDF) 27 Page - STMicroelectronics |
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L9662 bảng dữ liệu(HTML) 27 Page - STMicroelectronics |
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27 / 80 page ![]() DocID028325 Rev 1 27/80 L9662 Functional description 79 3.2.3 Reference resistor IREF pin shall be connected to VDD supply through a resistor, RIREF. When the device detects the resistor on IREF pin is larger than RIREF_H or smaller than RIREF_L, it goes into a reset condition. All outputs are disabled and all internal registers are reset to their default conditions. 3.2.4 Loss of ground GND When the GND pin is disconnected from PC-board ground, the ASIC goes in reset condition. All outputs are disabled and all internal registers are reset to their default conditions. GND0-GND7 A loss of power-ground (GND0 – GND7) pin/s disables the respective low side driver/s on SQLx. However, the high side driver of the respective channel will still be able to be turned on. Thus under the scenario where the low side is shorted to ground the device will be able to provide the programmed firing current for the specified time. An open GNDx connection on any channel has no affect on the other channels. An open GNDx condition will be detected using the low side MOS diagnostics. AGND The AGND pin is a reference for AOUT pin. When AGND loses its connection, the voltage on AOUT pin is pulled up to VDD voltage. The rest of functionality and parametric is not affected by a loss of AGND condition. 3.2.5 VRESx capacitance To ensure all diagnostics function properly a typical capacitor of equal to or greater than 68nF is required for every 4 VRESx pins and located close to the supply pins. Thus a capacitor will be placed close to the VRES0, 1,2, and 3 pins and a second capacitor will be close to the VRES4, 5,6, and 7 pins. 3.2.6 Supply voltages The primary current sources for the different functions of the ASIC are as follows: VRESx - Firing currents along with HSS and HS FET diagnostic currents VSDIAG - Squib resistance and HSS diagnostics VSATS - Voltage and current necessary for satellite operation excluding period during sync pulse VSYNC - Sync pulse voltage VDD will be used for all internal functions as well as short to battery/ground and high squib resistance diagnostics. 3.2.7 Ground connections The GND pins (6, 38, and 45) are all common internal to the ASIC. A ground plane is needed to directly connect the GND pins together so that low impedance is maintained between the two pins. This ground plane needs to be isolated from the high current ground for the squib drivers to prevent voltage shifts. |
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