AT89LP51RB2 datasheet(16/254 Pages) ATMEL

16 / 254 page

3722A–MICRO–10/11

AT89LP51RB2/RC2/IC2 Preliminary

3.1.2

SIG

In addition to the 24K/32K code space, the AT89LP51RB2/RC2/IC2 also supports a 512-byte

User Signature Array and a 128-byte Atmel Signature Array that are accessible by the CPU. The

Atmel Signature Array is initialized with the Device ID in the factory. The User Signature Array is

available for user identification codes or constant parameter data. Data stored in the signature

array is not secure. Security bits will disable writes to the array; however, reads by an external

device programmer are always allowed. The signatures can be accessed with the Flash API

functions or low-level IAP interface. See Section 24.4 “In-Application Programming (IAP)” on

page 190 for more information.

3.2

Internal Data Memory

The AT89LP51RB2/RC2/IC2 contains 256 bytes of general SRAM data memory plus 128 bytes

of I/O memory mapped into a single 8-bit address space. Access to the internal data memory

does not require any configuration. The internal data memory has three address spaces: DATA,

IDATA and SFR; as shown in Figure 3-5. Some portions of external data memory are also imple-

mented internally. See “External Data Memory” below for more information.

Figure 3-5.

Internal Data Memory Map

3.2.1

DATA

The first 128 bytes of RAM are directly addressable by an 8-bit address (00H–7FH) included in

the instruction. The lowest 32 bytes of DATA memory are grouped into 4 banks of 8 registers

each. The RS0 and RS1 bits (PSW.3 and PSW.4) select which register bank is in use. Instruc-

tions using register addressing will only access the currently specified bank. The lower 128 bit

addresses are also mapped into DATA addresses 20H—2FH.

3.2.2

IDATA

The full 256 byte internal RAM can be indirectly addressed using the 8-bit pointers R0 and R1.

The first 128 bytes of IDATA include the DATA space. The hardware stack is also located in the

IDATA space.

3.2.3

SFR

The upper 128 direct addresses (80H–FFH) access the I/O registers. I/O registers on AT89LP

devices are referred to as Special Function Registers. The SFRs can only be accessed through

direct addressing. All SFR locations are not implemented. See Section 4. for a listed of available

SFRs.

FFH

UPPER

128

80H

7FH

LOWER

128

ACCESSIBLE

BY DIRECT

ADDRESSING

FFH

80H

ACCESSIBLE

BY DIRECT

AND INDIRECT

ADDRESSING

SPECIAL

FUNCTION

REGISTERS

PORTS

STATUS AND

CONTROL BITS

REGISTERS

STACK POINTER

ACCUMULATOR

(ETC.)

TIMERS

ACCESSIBLE

BY INDIRECT

ADDRESSING

ONLY

IDATA

SFR

DATA/IDATA

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