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AT89LP51RB2 bảng dữ liệu(PDF) 86 Page - ATMEL Corporation

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Giải thích chi tiết về linh kiện  8-bit Microcontroller Compatible with 8051 Products
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86
3722A–MICRO–10/11
AT89LP51RB2/RC2/IC2 Preliminary
Figure 13-9. PWM Mode 2 Waveform
13.6.4
Mode 3 – Split 8-bit PWM
Timer 1 in PWM Mode 3 simply holds its count. The effect is the same as setting TR1 = 0.
Timer 0 in PWM Mode 3 establishes TL0 and TH0 as two separate PWM counters in a manner
similar to normal Mode 3. PWM Mode 3 on Timer 0 is shown in Figure 13-10. Only the Timer
Prescaler is available to change the output frequency during PWM Mode 3. TL0 can use the
Timer 0 control bits: GATE, TR0, INT0, PWM0EN and TF0. TH0 is locked into a timer function
and uses TR1, PWM1EN and TF1. RL0 provides the duty cycle for TL0 and RH0 provides the
duty cycle for TH0.
PWM Mode 3 is for applications requiring a single PWM channel and two timers, or two PWM
ch a nn els a nd a n e x t r a time r o r co u nt er. With T i me r 0 in PWM M o d e 3 , th e
AT89LP51RB2/RC2/IC2 can appear to have four Timer/Counters. When Timer 0 is in PWM
Mode 3, Timer 1 can be turned on and off by switching it out of and into its own Mode 3. In this
case, Timer 1 can still be used by the serial port as a baud rate generator or in any application
not requiring an interrupt. The following formulas give the output frequency and duty cycle for
Timer 0 in PWM Mode 3.
Note:
In Fast Mode, TPS applies only when the TnX2 bits in CKCON0 are set. TPS always
applies in Compatibility Mode, therefore setting TnX2 in Compatibility Mode will halve
the output frequency.
Tx
THx
FFh
Mode 3:
f
out
fSYS
256
-----------
1
TPS
1
+
---------------------
×
=
Mode 3, T0:
Duty Cycle %
100
RL0
256
-----------
×
=
Mode 3, T1:
Duty Cycle %
100
RH0
256
------------
×
=



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