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AT89LP51RB2 bảng dữ liệu(PDF) 82 Page - ATMEL Corporation |
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AT89LP51RB2 bảng dữ liệu(HTML) 82 Page - ATMEL Corporation |
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82 / 254 page ![]() 82 3722A–MICRO–10/11 AT89LP51RB2/RC2/IC2 Preliminary 13.4 Mode 2 – 8-bit Auto-Reload Timer/Counter Mode 2 configures the Timer register as an 8-bit Counter (TL1) with automatic reload, as shown in Figure 13-3. Overflow from TL1 not only sets TF1, but also reloads TL1 with the contents of TH1, which is preset by software. The reload leaves TH1 unchanged. Mode 2 operation is the same for Timer/Counter 0. The following equation gives the timeout period for Mode 2. In Fast Mode, TPS applies only when the TnX2 bits in CKCON0 are set. TPS always applies in Compatibility Mode, therefore setting TnX2 in Compatibility Mode will double the timeout period. Figure 13-3. Timer/Counter 1 Mode 2: 8-bit Auto-Reload Note: RH1/RL1 are not required by Timer 1 during Mode 2 and may be used as temporary storage registers. 13.5 Mode 3 – 8-bit Split Timer Timer 1 in Mode 3 simply holds its count. The effect is the same as setting TR1 = 0. Timer 0 in Mode 3 establishes TL0 and TH0 as two separate counters. The logic for Mode 3 on Timer 0 is shown in Figure 13-4. TL0 uses the Timer 0 control bits: C/T, GATE0, TR0, INT0, and TF0. TH0 is locked into a timer function (counting clock cycles) and takes over the use of TR1 and TF1 from Timer 1. Thus, TH0 now controls the Timer 1 interrupt. While Timer 0 is in Mode 3, Timer 1 will still obey its settings in TMOD but cannot generate an interrupt. Mode 3 is for applications requiring an extra 8-bit timer or counter. With Timer 0 in Mode 3, the AT89LP51RB2/RC2/IC2 can appear to have four Timer/Counters. When Timer 0 is in Mode 3, Timer 1 can be turned on and off by switching it out of and into its own Mode 3. In this case, Timer 1 can still be used by the serial port as a baud rate generator or in any application not requiring an interrupt. The following equation gives the timeout period for Mode 3. In Fast Mode, TPS applies only when the TnX2 bits in CKCON0 are set. TPS always applies in Compatibility Mode, therefore setting TnX2 in Compatibility Mode will double the timeout period. Mode 2: Time-out Period 256 THn – () f SYS -------------------------------- TPS 1 + () × = CLKSYS T1 Pin TR1 GATE1 TF1 TL1 (8 Bits) TH1 (8 Bits) Control Reload Interrupt INT0 Pin C/T = 0 C/T = 1 ÷TPS Mode 3: Time-out Period 256 f SYS ----------- TPS 1 + () × = |
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