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AT89LP51RB2 bảng dữ liệu(PDF) 72 Page - ATMEL Corporation |
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AT89LP51RB2 bảng dữ liệu(HTML) 72 Page - ATMEL Corporation |
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72 / 254 page ![]() 72 3722A–MICRO–10/11 AT89LP51RB2/RC2/IC2 Preliminary 12.1.3 Open-drain Output The open-drain output configuration turns off all pull-ups and only drives the pull-down transistor of the port pin when the port latch contains a logic “0”. To be used as a logic output, a port con- figured in this manner must have an external pull-up, typically a resistor tied to V DD. The pull- down for this mode is the same as for the quasi-bidirectional mode. The open-drain port configu- ration is shown in Figure 12-4. The input circuitry of P3.2, P3.3, P4.6 and P4.7 is not disabled during Power-down (see Figure 12-3) and therefore these pins should not be left floating during Power-down when configured in this mode. Figure 12-4. Open-Drain Output 12.1.4 Push-pull Output The push-pull output configuration has the same pull-down structure as both the open-drain and the quasi-bidirectional output modes, but provides a continuous strong pull-up when the port latch contains a logic “1”. The push-pull mode may be used when more source current is needed from a port output. The push-pull port configuration is shown in Figure 12-5. Figure 12-5. Push-pull Output 12.2 Port Analog Functions The AT89LP51RB2/RC2/IC2 incorporates two analog comparators and an 8-channel analog-to- digital converter. In order to give the best analog performance and minimize power consump- tion, pins that are being used for analog functions must have both their digital outputs and digital inputs disabled. Digital outputs are disabled by putting the port pins into the input-only mode as described in “Port Configuration” on page 69. The analog input pins will always default to input- only mode after reset regardless of the state of the Tristate-Port Fuse. Port Pin From Port Register Input Data PWD Port Pin VCC From Port Register Input Data PWD |
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