| công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
PIC18F2680ISPSQTP bảng dữ liệu(PDF) 343 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
PIC18F2680ISPSQTP bảng dữ liệu(HTML) 343 Page - Microchip Technology |
|
343 / 482 page ![]() © 2007 Microchip Technology Inc. Preliminary DS39625C-page 341 PIC18F2585/2680/4585/4680 23.15.5 BUS ACTIVITY WAKE-UP INTERRUPT When the PIC18F2585/2680/4585/4680 devices are in Sleep mode and the bus activity wake-up interrupt is enabled, an interrupt will be generated and the WAKIF bit will be set when activity is detected on the CAN bus. This interrupt causes the PIC18F2585/2680/4585/ 4680 devices to exit Sleep mode. The interrupt is reset by the MCU, clearing the WAKIF bit. 23.15.6 ERROR INTERRUPT When the error interrupt is enabled, an interrupt is generated if an overflow condition occurs or if the error state of the transmitter or receiver has changed. The error flags in COMSTAT will indicate one of the following conditions. 23.15.6.1 Receiver Overflow An overflow condition occurs when the MAB has assembled a valid received message (the message meets the criteria of the acceptance filters) and the receive buffer associated with the filter is not available for loading of a new message. The associated RXBnOVFL bit in the COMSTAT register will be set to indicate the overflow condition. This bit must be cleared by the MCU. 23.15.6.2 Receiver Warning The receive error counter has reached the MCU warning limit of 96. 23.15.6.3 Transmitter Warning The transmit error counter has reached the MCU warning limit of 96. 23.15.6.4 Receiver Bus Passive The receive error counter has exceeded the error- passive limit of 127 and the device has gone to error-passive state. 23.15.6.5 Transmitter Bus Passive The transmit error counter has exceeded the error- passive limit of 127 and the device has gone to error-passive state. 23.15.6.6 Bus-Off The transmit error counter has exceeded 255 and the device has gone to bus-off state. 23.15.6.7 Interrupt Acknowledge Interrupts are directly associated with one or more status flags in the PIR register. Interrupts are pending as long as one of the flags is set. Once an interrupt flag is set by the device, the flag can not be reset by the microcontroller until the interrupt condition is removed. |
|
Link URL |
| Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không? [ DONATE ] |
Alldatasheet là | Quảng cáo | Liên lạc với chúng tôi | Chính sách bảo mật | Liên kết đến bảng dữ liệu | Trao đổi link | Tìm kiếm theo nhà sản xuất All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |