PIC18F2680ISPSQTP datasheet(61/482 Pages) MICROCHIP

61 / 482 page

Preliminary

DS39625C-page 59

PIC18F2585/2680/4585/4680

BSEL0(6)

2585 2680 4585 4680

0000 00--

uuuu uu--

MSEL3(6)

2585 2680 4585 4680

0000 0000

uuuu uuuu

MSEL2(6)

2585 2680 4585 4680

0000 0000

uuuu uuuu

MSEL1(6)

2585 2680 4585 4680

0000 0101

uuuu uuuu

MSEL0(6)

2585 2680 4585 4680

0101 0000

uuuu uuuu

SDFLC(6)

2585 2680 4585 4680

---0 0000

-u-- uuuu

RXFCON1(6)

2585 2680 4585 4680

0000 0000

uuuu uuuu

RXFCON0(6)

2585 2680 4585 4680

0000 0000

uuuu uuuu

RXFBCON7(6) 2585 2680 4585 4680

0000 0000

uuuu uuuu

RXFBCON6(6) 2585 2680 4585 4680

0000 0000

uuuu uuuu

RXFBCON5(6) 2585 2680 4585 4680

0000 0000

uuuu uuuu

RXFBCON4(6) 2585 2680 4585 4680

0000 0000

uuuu uuuu

RXFBCON3(6) 2585 2680 4585 4680

0000 0000

uuuu uuuu

RXFBCON2(6) 2585 2680 4585 4680

0001 0001

uuuu uuuu

RXFBCON1(6) 2585 2680 4585 4680

0001 0001

uuuu uuuu

RXFBCON0(6) 2585 2680 4585 4680

0000 0000

uuuu uuuu

RXF15EIDL(6)

2585 2680 4585 4680

xxxx xxxx

uuuu uuuu

RXF15EIDH(6) 2585 2680 4585 4680

xxxx xxxx

uuuu uuuu

RXF15SIDL(6)

2585 2680 4585 4680

xxx- x-xx

uuu- u-uu

RXF15SIDH(6) 2585 2680 4585 4680

xxxx xxxx

uuuu uuuu

RXF14EIDL(6)

2585 2680 4585 4680

xxxx xxxx

uuuu uuuu

RXF14EIDH(6) 2585 2680 4585 4680

xxxx xxxx

uuuu uuuu

RXF14SIDL(6)

2585 2680 4585 4680

xxx- x-xx

uuu- u-uu

RXF14SIDH(6) 2585 2680 4585 4680

xxxx xxxx

uuuu uuuu

RXF13EIDL(6)

2585 2680 4585 4680

xxxx xxxx

uuuu uuuu

RXF13EIDH(6) 2585 2680 4585 4680

xxxx xxxx

uuuu uuuu

RXF13SIDL(6)

2585 2680 4585 4680

xxx- x-xx

uuu- u-uu

RXF13SIDH(6) 2585 2680 4585 4680

xxxx xxxx

uuuu uuuu

RXF12EIDL(6)

2585 2680 4585 4680

xxxx xxxx

uuuu uuuu

RXF12EIDH(6) 2585 2680 4585 4680

xxxx xxxx

uuuu uuuu

RXF12SIDL(6)

2585 2680 4585 4680

xxx- x-xx

uuu- u-uu

TABLE 4-4:

INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)

Applicable Devices

Power-on Reset,

Brown-out Reset

MCLR Resets,

WDT Reset,

RESET

Instruction,

Stack Resets

Wake-up via WDT

or Interrupt

Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.

Shaded cells indicate conditions do not apply for the designated device.

Note 1:

One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt

vector (0008h or 0018h).

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the

hardware stack.

See Table 4-3 for Reset value for specific condition.

Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When

not enabled as PORTA pins, they are disabled and read ‘0’.

This register reads all ‘0’s until the ECAN™ technology is set up in Mode 1 or Mode 2.

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