PIC18F2680ISPSQTP datasheet(297/482 Pages) MICROCHIP

297 / 482 page

Preliminary

DS39625C-page 295

PIC18F2585/2680/4585/4680

≤ n ≤ 5, TXnEN (BSEL0<n>) = 1](1)

R/W-0

R-0

R/W-0

TXBIF

TXABT

TXLARB

TXERR

TXREQ

RTREN

TXPRI1

TXPRI0

bit 7

bit 0

bit 7

TXBIF: Transmit Buffer Interrupt Flag bit(3)

= A message is successfully transmitted

= No message was transmitted

bit 6

TXABT: Transmission Aborted Status bit(3)

= Message was aborted

= Message was not aborted

bit 5

TXLARB: Transmission Lost Arbitration Status bit(3)

= Message lost arbitration while being sent

= Message did not lose arbitration while being sent

bit 4

TXERR: Transmission Error Detected Status bit(3)

= A bus error occurred while the message was being sent

= A bus error did not occur while the message was being sent

bit 3

TXREQ: Transmit Request Status bit(2,4)

= Requests sending a message; clears the TXABT, TXLARB and TXERR bits

= Automatically cleared when the message is successfully sent

bit 2

RTREN: Automatic Remote Transmission Request Enable bit

= When a remote transmission request is received, TXREQ will be automatically set

= When a remote transmission request is received, TXREQ will be unaffected

bit 1-0

TXPRI1:TXPRI0: Transmit Priority bits(5)

= Priority Level 3 (highest priority)

= Priority Level 2

= Priority Level 1

= Priority Level 0 (lowest priority)

Note 1: These registers are available in Mode 1 and 2 only.

2: Clearing this bit in software while the bit is set will request a message abort.

3: This bit is automatically cleared when TXREQ is set.

4: While TXREQ is set or transmission is in progress, transmit buffer registers remain

read-only.

5: These bits set the order in which the transmit buffer will be transferred. They do not

alter the CAN message identifier.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

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