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EN25Q64-104FIP bảng dữ liệu(PDF) 17 Page - Eon Silicon Solution Inc. |
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EN25Q64-104FIP bảng dữ liệu(HTML) 17 Page - Eon Silicon Solution Inc. |
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17 / 60 page ![]() This Data Sheet may be revised by subsequent versions ©2004 Eon Silicon Solution, Inc., www.eonssi.com or modifications due to changes in technical specifications. 17 EN25Q64 Rev. J, Issue Date: 2011/07/07 Table 5. Manufacturer and Device Identification OP Code (M7-M0) (ID15-ID0) (ID7-ID0) ABh 16h 90h 1Ch 16h 9Fh 1Ch 3017h Enable Quad Peripheral Interface mode (EQPI) (38h) The Enable Quad Peripheral Interface mode (EQPI) instruction will enable the flash device for Quad SPI bus operation. Upon completion of the instruction, all instructions thereafter will be 4-bit multiplexed input/output until a power cycle or “ Reset Quad I/O instruction “ instruction, as shown in Figure 5. The device did not support the Read Data Bytes (READ) (03h), Dual Output Fast Read (3Bh) and Dual Input/Output FAST_READ (BBh) modes while the Enable Quad Peripheral Interface mode (EQPI) (38h) turns on. Figure 5. Enable Quad Peripheral Interface mode Sequence Diagram Reset Quad I/O (RSTQIO) (FFh) The Reset Quad I/O instruction resets the device to 1-bit Standard SPI operation. To execute a Reset Quad I/O operation, the host drives CS# low, sends the Reset Quad I/O command cycle (FFh) then, drives CS# high. This command can’t be used in Standard SPI mode. |
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