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LPC64 bảng dữ liệu(PDF) 31 Page - NXP Semiconductors

tên linh kiện LPC64
Giải thích chi tiết về linh kiện  32-bit ARM Cortex-M3 microcontroller; up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN
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LPC64 bảng dữ liệu(HTML) 31 Page - NXP Semiconductors

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LPC1768_67_66_65_64_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 19 November 2009
31 of 65
NXP Semiconductors
LPC1768/67/66/65/64
32-bit ARM Cortex-M3 microcontroller
See Figure 4 for an overview of the LPC17xx clock generation.
7.29.1.1
Internal RC oscillator
The IRC may be used as the clock source for the WDT, and/or as the clock that drives the
PLL and subsequently the CPU. The nominal IRC frequency is 4 MHz. The IRC is
trimmed to 1 % accuracy over the entire voltage and temperature range.
Upon power-up or any chip reset, the LPC17xx use the IRC as the clock source. Software
may later switch to one of the other available clock sources.
7.29.1.2
Main oscillator
The main oscillator can be used as the clock source for the CPU, with or without using the
PLL. The main oscillator also provides the clock source for the dedicated USB PLL.
The main oscillator operates at frequencies of 1 MHz to 25 MHz. This frequency can be
boosted to a higher frequency, up to the maximum CPU operating frequency, by the main
PLL. The clock selected as the PLL input is PLLCLKIN. The ARM processor clock
frequency is referred to as CCLK elsewhere in this document. The frequencies of
PLLCLKIN and CCLK are the same value unless the PLL is active and connected. The
clock frequency for each peripheral can be selected individually and is referred to as
PCLK. Refer to Section 7.29.2 for additional information.
7.29.1.3
RTC oscillator
The RTC oscillator can be used as the clock source for the RTC block, the main PLL,
and/or the CPU.
Fig 4.
LPC17xx clocking generation block diagram
MAIN
OSCILLATOR
INTERNAL
RC
OSCILLATOR
RTC
OSCILLATOR
MAIN PLL
WATCHDOG
TIMER
REAL-TIME
CLOCK
CPU
CLOCK
DIVIDER
PERIPHERAL
CLOCK
GENERATOR
USB BLOCK
ARM
CORTEX-M3
ETHERNET
BLOCK
DMA
GPIO
NVIC
USB
CLOCK
DIVIDER
system
clock
select
(CLKSRCSEL)
USB clock config
(USBCLKCFG)
CPU clock config
(CCLKCFG)
pllclk
CCLK/8
CCLK/6
CCLK/4
CCLK/2
CCLK
pclkWDT
rtclk = 1Hz
usbclk
(48 MHz)
cclk
USB PLL
USB PLL enable
main PLL enable
32 kHz
APB peripherals
LPC17xx
002aad947



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