HCS12 datasheet(19/452 Pages) FREESCALE

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S12CPUV2 Reference Manual, Rev. 4.0

Freescale Semiconductor

1.3.4 Definitions

Logic level 1 is the voltage that corresponds to the true (1) state.

Logic level 0 is the voltage that corresponds to the false (0) state.

Set refers specifically to establishing logic level 1 on a bit or bits.

Cleared refers specifically to establishing logic level 0 on a bit or bits.

Asserted means that a signal is in active logic state. An active low signal

changes from logic level 1 to logic level 0 when asserted, and an active

high signal changes from logic level 0 to logic level 1.

Negated means that an asserted signal changes logic state. An active low

signal changes from logic level 0 to logic level 1 when negated, and an

active high signal changes from logic level 1 to logic level 0.

ADDR is the mnemonic for address bus.

DATA is the mnemonic for data bus.

LSB means least significant bit or bits.

MSB means most significant bit or bits.

LSW means least significant word or words.

MSW means most significant word or words.

A specific bit location within a range is referred to by mnemonic and

number. For example, A7 is bit 7 of accumulator A.

A range of bit locations is referred to by mnemonic and the numbers that

define the range. For example, DATA[15:8] form the high byte of the data

bus.

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