HCS12 datasheet(29/452 Pages) FREESCALE

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S12CPUV2 Reference Manual, Rev. 4.0

Freescale Semiconductor

3.1 Introduction

Addressing modes determine how the central processor unit (CPU)

accesses memory locations to be operated upon. This section discusses

the various modes and how they are used.

3.2 Mode Summary

Addressing modes are an implicit part of CPU12 instructions. Refer to

Appendix A. Instruction Reference for the modes used by each

instruction. All CPU12 addressing modes are shown in Table 3-1.

The CPU12 uses all M68HC11 modes as well as new forms of indexed

addressing. Differences between M68HC11 and M68HC12 indexed modes

are described in 3.9 Indexed Addressing Modes. Instructions that use

more than one mode are discussed in 3.10 Instructions Using Multiple

Modes.

3.3 Effective Address

Each addressing mode except inherent mode generates a 16-bit effective

address which is used during the memory reference portion of the

instruction. Effective address computations do not require extra execution

cycles.

Reference Manual — S12CPUV2

Section 3. Addressing Modes

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