HCS12 datasheet(62/452 Pages) FREESCALE

62 / 452 page

S12CPUV2 Reference Manual, Rev. 4.0

Freescale Semiconductor

5.9 Compare and Test Instructions

Compare and test instructions perform subtraction between a pair of

registers or between a register and memory. The result is not stored, but

condition codes are set by the operation. These instructions are generally

used to establish conditions for branch instructions. In this architecture,

most instructions update condition code bits automatically, so it is often

unnecessary to include separate test or compare instructions. Table 5-7 is

a summary of compare and test instructions.

Table 5-7. Compare and Test Instructions

Mnemonic

Function

Operation

Compare Instructions

CBA

Compare A to B

(A) – (B)

CMPA

Compare A to memory

(A) – (M)

CMPB

Compare B to memory

(B) – (M)

CPD

Compare D to memory (16-bit)

: B) – (M : M + 1)

CPS

Compare SP to memory (16-bit)

(SP) – (M

: M + 1)

CPX

Compare X to memory (16-bit)

(X) – (M

: M + 1)

CPY

Compare Y to memory (16-bit)

(Y) – (M

: M + 1)

Test Instructions

TST

Test memory for zero or minus

(M) – $00

TSTA

Test A for zero or minus

(A) – $00

TSTB

Test B for zero or minus

(B) – $00

HCS12 bảng dữ liệu(PDF) 62 Page - Freescale Semiconductor, Inc

HCS12 bảng dữ liệu(HTML) 62 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL