HCS12 datasheet(138/452 Pages) FREESCALE

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S12CPUV2 Reference Manual, Rev. 4.0

138

Freescale Semiconductor

Operation:

(PC) + $0002

⇒ PC

Description:

Never branches. BRN is effectively a 2-byte NOP that requires one cycle to

execute. BRN is included in the instruction set to provide a complement to

the BRA instruction. The instruction is useful during program debug, to

negate the effect of another branch instruction without disturbing the offset

byte. A complement for BRA is also useful in compiler implementations.

Execution time is longer when a conditional branch is taken than when it is

not, because the instruction queue must be refilled before execution

resumes at the new address. Since the BRN branch condition is never

satisfied, the branch is never taken, and only a single program fetch is

needed to update the instruction queue.

See 3.8 Relative Addressing Mode for details of branch execution.

BRN

Branch Never

BRN

CCR Details:

HIN

––––––––

Source Form

Address

Mode

Object Code

Access Detail

HCS12

M68HC12

BRN rel8

REL

21 rr

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