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HCS12 bảng dữ liệu(PDF) 363 Page - Freescale Semiconductor, Inc

tên linh kiện HCS12
Giải thích chi tiết về linh kiện  HCS12 Microcontrollers
PDF  452 Pages
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nhà sản xuất  FREESCALE [Freescale Semiconductor, Inc]
Trang chủ  http://www.freescale.com
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HCS12 bảng dữ liệu(HTML) 363 Page - Freescale Semiconductor, Inc

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S12CPUV2 Reference Manual, Rev. 4.0
Freescale Semiconductor
363
In cycle 2.0, the first element of the rule list (a 16-bit address) is read from
memory. Due to propagation delays, this value cannot be used for
calculations until two cycles later (cycle 4.0). The X index register, which is
used to access information from the rule list, is incremented by two to point
at the next element of the rule list.
The operations performed in cycle 4.0 depend on the value of the word read
from the rule list. $FFFE is a special token that indicates a transition from
antecedents to consequents or from consequents to antecedents of a new
rule. The V bit can be used to decide which transition is taking place, and V
is toggled each time the $FFFE token is detected. If V was zero, a change
from antecedents to consequents is taking place, and it is time to apply
weighting (provided it is enabled by the C bit equal one). The address in
TMP2 (derived from Y) is used to read the weight byte from memory. In this
case, there is no bus access in cycle 5.0, but the index into the rule list is
updated to point to the next rule element.
The old value of X (X0) is temporarily held on internal nodes, so it can be
used to access a rule word in cycle 7.2. The read of the rule word is timed
to start two cycles before it will be used in cycle 4.0 of the next loop pass.
The actual multiply takes place in cycles 6.2 through 8.2. The 8-bit weight
from memory is incremented (possibly overflowing to $100) before the
multiply, and the upper eight bits of the 16-bit internal result is used as the
weighted result. By using weight+1, the result can range from 0.0 times A to
1.0 times A. After 8.2, flow continues to the next loop pass at cycle 4.0.
At cycle 4.0, if Rx is $FFFE and V was one, a change from consequents to
antecedents of a new rule is taking place, so accumulator A must be
reinitialized to $FF. During processing of rule antecedents, A is updated with
the smaller of A, or the current fuzzy input (cycle 6.0). Cycle 5.0 is usually
used to read the next rule word and update the pointer in X. This read is
skipped if the current Rx is $FFFF (end of rules mark). If this is a weight
multiply pass, the read is delayed until cycle 7.2. During processing of
consequents, cycle 6.1 is used to optionally update a fuzzy output if the
value in accumulator A is larger.
After all rules have been processed, cycle 7.0 is used to update the PC to
point at the next instruction. If weights were enabled, Y is updated to point
at the location that immediately follows the last rule weight.



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