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AT697F bảng dữ liệu(PDF) 64 Page - ATMEL Corporation

tên linh kiện AT697F
Giải thích chi tiết về linh kiện  Rad-Hard 32 bit SPARC V8 Processor
PDF  155 Pages
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nhà sản xuất  ATMEL [ATMEL Corporation]
Trang chủ  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT697F bảng dữ liệu(HTML) 64 Page - ATMEL Corporation

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7703C–AERO–6/09
AT697F ADVANCE INFORMATION
Debug Operations
Instruction Breakpoints
To insert instruction breakpoints, the breakpoint instruction (ta 1) should be used. This will leave
the four IU hardware breakpoints free to be used as data watchpoints. Since cache snooping is
only done on the data cache, the instruction cache must be flushed after the insertion or removal
of breakpoints. To minimize the influence on execution, it is enough to clear the corresponding
instruction cache tag (which is accesible through the DSU).
The DSU hardware breakpoints should only be used to freeze the trace buffer, and not for soft-
ware debugging since there is a 4-cycle delay from the breakpoint hit before the processor
enters the debug mode.
Single Stepping
By writing the TBC SS and reseting the TBC BN bit, the processor will resume execution for
one instruction and then automatically enter debug mode.
DSU Trap
The DSU trap register (DTR) consists in a read-only register that indicates which SPARC trap
type caused the processor to enter debug mode.
When debug mode is forced by setting the TBC BN, the trap type is 0x0B.



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