AT697F datasheet(47/155 Pages) ATMEL

47 / 155 page

AT697F ADVANCE INFORMATION

7703C–AERO–6/09

Timer Unit

Prescaler

Timer/Counter1, Timer/Counter2 and the watchdog share the same prescaler.

The prescaler consists of a 10-bit down counter clocked by the system clock. The prescaler is

decremented on each clock cycle. When the prescaler underflows, it is automatically reloaded

with the content of the prescaler reload register. A count tick is generated for the two timers and

the watchdog.

The effective division rate is equal to prescaler reload register value + 1.

Figure 30. Prescaler Block Diagram

Control Logic

Reload Reg.

Counter Reg.

=0x3FF

clock

count tick

load

SCAR

SCAC

Note:

The reset value for SCAR is 0. This is not a legal value, it is however equivalent to a value of 3

and leads to a division rate of 4.

Caution :

The two timers and watchdog share the same decrementer. The minimum allowed prescaler

division factor is 4 (reload register = 3).

Timer/Counter 1 &

Timer/Counter 2

Timer/Counter1, Timer/Counter2 are two general purpose 32-bit timers. They share the same

decrementer. The timer value is then decremented each time the prescaler generates a timer

pulse.

Each timer operation is controlled through a dedicated Timer Control register (TIMCTR). A timer

is enabled/disabled by setting TIMCTRx ENx.

Each time a timer underflows, an interrupt is generated. These interrupts can be masked with

the Interrupt Mask and Priority register (ITMP).

Setting TIMCTRx RLx, the content of the reload register (TIMR) is automatically reloaded in the

Timer Counter register (TIMC) after an underflow and the timer continue running. If the reload bit

is reset, the timer stops running after its first underflow.

Timer Counter can be forced with the Timer Reload value at any time by asserting the load bit

TIMCTRx LDx in the Timer Control register.

Figure 31. Timer/Counter 1/2 Block Diagram

Control Logic

Reload Reg.

Counter Reg.

Control Reg.

=0xFFFFFFFF

count tick

timer interrupts

load

enable/disable

TIMCTRn

TIMRn

TIMCn

(irq 8 & 9)

AT697F bảng dữ liệu(PDF) 47 Page - ATMEL Corporation

AT697F bảng dữ liệu(HTML) 47 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL