AT697F datasheet(31/155 Pages) ATMEL

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AT697F ADVANCE INFORMATION

7703C–AERO–6/09

Figure 14. RAM Protection Mode Overview

Segment 2

Segment 1

Segment 2

Segment mode (bp = 0)

Write

trap

Block mode (bp = 1)

RAM

Segment 1

Write

trap

Write

trap

Write

trap

Write

trap

START1

END1

START2

END2

START1

END1

START2

END2

Mask Scheme

Two block protection units are available for RAM area. Each one is controlled through a

write protection register (WPRn). Two major fields are defined : a TAG and a MASK.

•

The TAG defines the 15 most significant bits of the address of the block to be write protected.

•

The Mask specifies which bits of the TAG are really relevant for the protection.

The write protection on the RAM area is enabled setting logical one in WPRx EN. If this bit is

set logical zero, no protection is activated.

Two protection modes can be programmed. If the WPRx BP is set logical one the protection is

active within the segment. If this bit is set logical zero, the exterior of the segment is protected.

Figure 15. RAM Protection Mode Overview

Segment 2

Segment 1

Segment 2

Segment mode (bp = 0)

Write

trap

Block mode (bp = 1)

RAM

Segment 1

Write

trap

Write

trap

Write

trap

Write

trap

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