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TL28L92 bảng dữ liệu(PDF) 12 Page - Texas Instruments

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tên linh kiện TL28L92
Giải thích chi tiết về linh kiện  3.3-V/5-V Dual Universal Asynchronous Receiver/Transmitter
PDF  61 Pages
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Trang chủ  http://www.ti.com
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TL28L92 bảng dữ liệu(HTML) 12 Page - Texas Instruments

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TL28L92
3.3-V/5-V Dual Universal Asynchronous Receiver/Transmitter
SLLS890A – AUGUST 2008 – REVISED OCTOBER 2008
www.ti.com
Table 1-1. PIN DESCRIPTION FOR 80xxx INTERFACE (continued)
TERMINAL
TYPE
DESCRIPTION
QFP (FR)
QFN (RGZ)
NAME
PIN NO.
PIN NO.
OP7
10
12
O
Output 7: General-purpose output, or channel B open-drain, active LOW, TxB
interrupt ISR[4] output.
IP0
2
2
I
Input 0: General purpose input or channel A clear to send active LOW input
(CTSAN).
IP1
43
47
I
Input 1: General purpose input or channel B clear to send active LOW input
(CTSBN).
IP2
34
38
I
Input 2: General-purpose input or counter/timer external clock input.
IP3
41
45
I
Input 3: General purpose input or channel A transmitter external clock input (TxCA).
When the external clock is used by the transmitter, the transmitted data is clocked on
the falling edge of the clock.
IP4
37
41
I
Input 4: General purpose input or channel A receiver external clock input (RxCA).
When the external clock is used by the receiver, the received data is sampled on the
rising edge of the clock.
IP5
36
40
I
Input 5: General purpose input or channel B transmitter external clock input (TxCB).
When the external clock is used by the transmitter, the transmitted data is clocked on
the falling edge of the clock.
IP6
35
39
I
Input 6: General purpose input or channel B receiver external clock input (RxCB).
When the external clock is used by the receiver, the received data is sampled on the
rising edge of the clock.
VCC
38, 39
42
Pwr
Power supply: 3.3 V
± 10% or 5 V ± 10 % supply input.
General Description
12
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