TL28L92 datasheet(48/61 Pages) TI

48 / 61 page

TL28L92

3.3-V/5-V Dual Universal Asynchronous Receiver/Transmitter

SLLS890A – AUGUST 2008 – REVISED OCTOBER 2008

www.ti.com

DYNAMIC CHARACTERISTICS FOR 5-V OPERATION (continued)

over operating free-air temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Clock Timing (see Figure 5-9)

tCLK

X1/CLK HIGH or LOW time

fCLK

X1/CLK frequency

0.1(1)

3.686

MHz

C/T clock (IP2) HIGH or LOW time

tCTC

(C/T external clock input)

fCTC

C/T clock (IP2) frequency

0(1)

MHz

tRX

RxC HIGH or LOW time

0(1)

fRX

RxC frequency

MHz

×(2)

0(1)

tTX

TxC HIGH or LOW time

fTX

TxC frequency

MHz

×(2)

0(2)

Transmitter Timing, External Clock (see Figure 5-10)

tTXD

TxD output delay from TxC LOW (TxC input pin)

Output delay from TxC output pin LOW to TxD

tTCS

data output

Receiver Timing, External Clock (see Figure 5-11)

tRXS

RxD data set-up time to RxC HIGH

tRXH

RxD data hold time from RxC HIGH

68xxx or Motorola Bus Timing (see Figure 5-3, Figure 5-4, and Figure 5-5)(3)

tDCR

DACKN LOW (read cycle) from X1 HIGH

tDCW

DACKN LOW (write cycle) from X1 HIGH

DACKN high-impedance from CEN or IACKN

tDAT

HIGH

CEN or IACKN set-up time to X1 HIGH for

tCSC

minimum DACKN cycle

(1)

Minimum frequencies are not tested but are ensured by design.

(2)

Clocks for 1

× mode should maintain a 60/40 duty cycle or better.

(3)

Minimum DACKN time is ((tDCR or tDCW) tCSC + 2 X1 edges + rise time over 5 ns). Two X1 edges is 273 ns at 3.6864 MHz. For faster

bus cycles, the 80xxx bus timing may be used while in the 68xxx mode. It is not necessary to wait for DACKN to insure the proper

operation of the SC28C92. In all cases the data will be written to the TL28L92 on the falling edge of DACKN or the rise of CEN. The fall

of CEN initializes the bus cycle. The rise of CEN ends the bus cycle. DACKN LOW or CEN HIGH completes the write cycle.

Electrical Specifications

Submit Documentation Feedback

TL28L92 bảng dữ liệu(PDF) 48 Page - Texas Instruments

TL28L92 bảng dữ liệu(HTML) 48 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61

bảng dữ liệu tải về

Link URL