ST20-C1 datasheet(144/205 Pages) STMICROELECTRONICS

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smacloop

short multiply accumulate loop

Code: 21 F6

Description: Multiply pairs of signed16-bit values and accumulate the products. On

entry Areg and Breg contain the addresses of arrays X and Y of 16-bit values and

Creg holds the initial 32-bit accumulator. On exit the accumulator is in Areg, while

Breg and Creg contain the next addresses in the X and Y arrays respectively. The X

values can be in a circular buffer whose address is exactly divisible by the size. The

loop count, buffer size, mode and scaling codes, held in the status register, may be set

by the

smacinit instruction.

Warning: This instruction is not interruptible. If interrupt latency is critical then a

similar result may be achieved by executing the instruction many times with small

counts. The result may not be the same, since rounding occurs at the end of the

instruction from the internal 48-bit accumulator to a 32-bit result.

Definition:

if (Statusoverflow)

Areg

′← max

else if (Statusunderflo w)

Areg

′← min

else if (

overflow)

{

Status

′

overflow ← set

Areg

′← max

}

else if (

underflow)

{

Status

′

underflo w ← set

Areg

′← min

}

else

{

Areg

′← acc >>

arith shift1

}

Breg

′← xaddress (Status

mac_count)

Creg

′← Breg + (2 × Status

mac_count)

where

acc = (Creg << shift1) + (1 << (shift1-1))

i=0..n-1[sixteen[xaddress(i )] × (sixteen[Breg + 2.i] << shift2)]

–

the value of acc is calculated to 48-bit precision

if (Statusmac_count = 0) n=256

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