ST20-C1 datasheet(82/205 Pages) STMICROELECTRONICS

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7.5 Inactive processes

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7.5

Inactive processes

An inactive process is a process that is waiting for some event to occur, such as a

process executing a

run instruction or a peripheral completing a DMA. An inactive

process cannot continue even if the CPU is idle. Inactive processes are not polled, but

should be rescheduled by the event for which they are waiting.

A process becomes inactive by saving its own state and then executing the

stop

instruction.

stop automatically saves the Iptr and Wptr in the process control block.

The code should save the Tdesc in an appropriate place where the awaited event can

find it. The Tdesc points to the process control block. The Iptr is loaded onto the eval-

uation stack using

ldpi, the Wptr using ldlp 0 and the Tdesc using ldtdesc. For

example:

ldtdesc; ld tdesc_save_address; stnl 0;

stop;

Two mechanisms are provided for rescheduling inactive processes:

• Executing the run instruction. This allows other processes to reschedule an

inactive process. For example, this is used when semaphore signalling to a

waiting process and could be used by other communications, possibly imple-

mented by an operating system.

• Scheduling an exception. This allows external devices to reschedule an inac-

tive process. For example, this is used by DMA peripherals to wake a process

waiting for the DMA to complete. Exception scheduling is described in section

4.11.

The

run instruction takes a task descriptor in Areg and adds the process control block

to the back of the scheduling queue. For example:

ld task_descriptor ; run;

Inactive processes may need to be queued, for example while waiting for a sema-

phore. The semaphore queue handling is incorporated into the signal and wait instruc-

tions, but for other queues the instructions

enqueue and dequeue are needed.

Enqueue will add a process to the back of an arbitrary queue, and dequeue will take a

process from the front of the queue.

7.6

Descheduled process state

When a process restarts after an interrupt or trap, the entire state is loaded from the

saved state. However, when the process starts or restarts after being descheduled,

the CPU makes assumptions about the state of the process, since not all the state

was saved.

Wptr and Iptr are set to the values saved in pw.Wptr and pw.Iptr of the process

descriptor block.

The status register is set to the values shown in Table 7.3. The global interrupt enable

and timeslice enable are global status bits, and are carried over from one process to

the next when a context switch occurs.

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