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STM32F103X6 bảng dữ liệu(PDF) 82 Page - STMicroelectronics |
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STM32F103X6 bảng dữ liệu(HTML) 82 Page - STMicroelectronics |
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82 / 84 page ![]() Revision history STM32F103xx 82/84 22-Nov-2007 4 Document status promoted from preliminary data to datasheet. The STM32F103xx is USB certified. Small text changes. Power supply schemes on page 10 modified. Number of communication peripherals corrected for STM32F103Tx and number of GPIOs corrected for LQFP package in Table 2: Device features and peripheral counts (STM32F103xx performance line). Main function and default alternate function modified for PC14 and PC15 in, Note 5 added and Remap column added in Table 3: Pin definitions. VDD–VSS ratings and Note 1 modified in Table 4: Voltage characteristics, Note 1 modified in Table 5: Current characteristics. Note 1 and Note 2 added in Table 9: Embedded reset and power control block characteristics. IDD value at 72 MHz with peripherals enabled modified in Table 12: Maximum current consumption in Run mode, code with data processing running from RAM. IDD value at 72 MHz with peripherals enabled modified in Table 13: Maximum current consumption in Sleep mode, code running from Flash or RAM. IDD_VBAT typical value at 2.4 V modified and IDD_VBAT maximum values added in Table 14: Typical and maximum current consumptions in Stop and Standby modes. Note added in Table 15 on page 39 and Table 16 on page 40. ADC1 and ADC2 consumption and notes modified in Table 18: Peripheral current consumption. tSU(HSE) and tSU(LSE) conditions modified in Table 21 and Table 22, respectively. Maximum values removed from Table 25: Low-power mode wakeup timings. tRET conditions modified in Table 28: Flash memory endurance and data retention. Figure 11: Power supply scheme corrected. Figure 16: Current consumption in Stop mode with regulator in Low- power mode versus temperature at VDD = 3.3 V and 3.6 V added. Note removed below Figure 25: SPI timing diagram - slave mode and CPHA = 0. Note added below Figure 26: SPI timing diagram - slave mode and CPHA = 1(1). Details on unused pins removed from General input/output characteristics on page 53. Table 40: SPI characteristics updated. Table 41: USB startup time added. VAIN, tlat and tlatr modified, note added and Ilkg removed in Table 44: ADC characteristics. Test conditions modified and note added in Table 47: ADC accuracy. Note added below Table 45 and Table 48. Inch values corrected in Table 51: LQPF100, 100-pin low-profile quad flat package mechanical data, Table 52: LQFP64, 64-pin low-profile quad flat package mechanical data and Table 53: LQFP48, 48-pin low- profile quad flat package mechanical data. ΘJAvalue for VFQFPN36 package added in Table 54: Thermal characteristics . Order codes replaced by Section 7: Ordering information scheme. MCU ‘s operating conditions modified in Typical current consumption on page 38. Avg_Slope and V25 modified in Table 48: TS characteristics. I2C interface characteristics on page 58 modified. Impedance size specified in A.4: Voltage glitch on ADC input 0 on page 81. Table 56. Document revision history (continued) Date Revision Changes |
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