HCS08 datasheet(140/198 Pages) NXP

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Keyboard Interrupts (S08KBIV2)

MC9S08QD4 Series MCU Data Sheet, Rev. 6

140

Freescale Semiconductor

10.4

Functional Description

This on-chip peripheral module is called a keyboard interrupt (KBI) module because originally it was

designed to simplify the connection and use of row-column matrices of keyboard switches. However, these

inputs are also useful as extra external interrupt inputs and as an external means of waking the MCU from

stop or wait low-power modes.

The KBI module allows up to eight pins to act as additional interrupt sources. Writing to the KBIPEn bits

in the keyboard interrupt pin enable register (KBIPE) independently enables or disables each KBI pin.

Each KBI pin can be configured as edge sensitive or edge and level sensitive based on the KBMOD bit in

the keyboard interrupt status and control register (KBISC). Edge sensitive can be software programmed to

be either falling or rising; the level can be either low or high. The polarity of the edge or edge and level

sensitivity is selected using the KBEDGn bits in the keyboard interrupt edge select register (KBIES).

10.4.1

Edge Only Sensitivity

Synchronous logic is used to detect edges. A falling edge is detected when an enabled keyboard interrupt

(KBIPEn=1) input signal is seen as a logic 1 (the deasserted level) during one bus cycle and then a logic 0

(the asserted level) during the next cycle. A rising edge is detected when the input signal is seen as a logic

0 (the deasserted level) during one bus cycle and then a logic 1 (the asserted level) during the next

cycle.Before the first edge is detected, all enabled keyboard interrupt input signals must be at the

deasserted logic levels. After any edge is detected, all enabled keyboard interrupt input signals must return

to the deasserted level before any new edge can be detected.

A valid edge on an enabled KBI pin will set KBF in KBISC. If KBIE in KBISC is set, an interrupt request

will be presented to the CPU. Clearing of KBF is accomplished by writing a 1 to KBACK in KBISC.

10.4.2

Edge and Level Sensitivity

A valid edge or level on an enabled KBI pin will set KBF in KBISC. If KBIE in KBISC is set, an interrupt

request will be presented to the CPU. Clearing of KBF is accomplished by writing a 1 to KBACK in

765

210

KBEDG7

KBEDG6

KBEDG5

KBEDG4

KBEDG3

KBEDG2

KBEDG1

KBEDG0

Reset:

000

Figure 10-5. KBI Edge Select Register

Table 10-4. KBIES Register Field Descriptions

Field

Description

7:0

KBEDGn

Keyboard Edge Selects — Each of the KBEDGn bits selects the falling edge/low level or rising edge/high level

function of the corresponding pin).

0 Falling edge/low level.

1 Rising edge/high level.

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