HCS08 datasheet(103/198 Pages) NXP

103 / 198 page

Analog-to-Digital Converter (S08ADC10V1)

MC9S08QD4 Series MCU Data Sheet, Rev. 6

Freescale Semiconductor

103

8.3.5

Compare Value High Register (ADCCVH)

This register holds the upper two bits of the 10-bit compare value. These bits are compared to the upper

two bits of the result following a conversion in 10-bit mode when the compare function is enabled.In 8-bit

operation, ADCCVH is not used during compare.

8.3.6

Compare Value Low Register (ADCCVL)

This register holds the lower 8 bits of the 10-bit compare value, or all 8 bits of the 8-bit compare value.

Bits ADCV7:ADCV0 are compared to the lower 8 bits of the result following a conversion in either 10-bit

or 8-bit mode.

8.3.7

Configuration Register (ADCCFG)

ADCCFG is used to select the mode of operation, clock source, clock divide, and configure for low power

or long sample time.

432

ADR7

ADR6

ADR5

ADR4

ADR3

ADR2

ADR1

ADR0

Reset:

= Unimplemented or Reserved

Figure 8-7. Data Result Low Register (ADCRL)

ADCV9

ADCV8

Reset:

= Unimplemented or Reserved

Figure 8-8. Compare Value High Register (ADCCVH)

432

ADCV7

ADCV6

ADCV5

ADCV4

ADCV3

ADCV2

ADCV1

ADCV0

Reset:

Figure 8-9. Compare Value Low Register(ADCCVL)

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